1. Field of the Invention
This invention pertains generally to logarithmic amplifiers, and more particularly to progressive-compression logarithmic amplifiers.
2. Background of the Invention
A logarithmic amplifier has a transfer function that relates its output signal to the decibel (dB) magnitude of its input signal. A typical logarithmic amplifier can respond accurately to an input having a dynamic range of 70 dB or more, with some devices capable of responding to an input having a dynamic range of over 100 dB.
Progressive-compression logarithmic amplifiers approximate a logarithmic transfer function by cascading several amplifier stages, with each stage having a non-logarithmic transfer function. For instance, each stage may be implemented as an "A/0" stage. An A/0 stage has a transfer function resembling the mathematical tanh function--such stages have a linear gain A for small inputs. The gain for further increases in input rolls off to 0 as the amplifier reaches saturation. The A/0 tanh stage has several advantages that make it ideal for a logarithmic amplifier: it is simple to build, when cascaded and augmented with the means to sum the outputs of these individual cells, it can provide a low-ripple logarithmic approximation, its scaling parameters (slope and intercept) can be made relatively insensitive to temperature changes, and these parameters can be rendered insensitive to supply voltage variations.
FIG. 1 shows a five-stage demodulating progressive-compression logarithmic amplifier 20. The amplifier uses five cascaded A/0 stages 22, 24, 26, 28, and 30. Each stage has a differential input, and can accept an input voltage (V.sub.in+ -V.sub.in-) that is either positive or negative. The differential outputs of the five cascaded stages are combined by summing the outputs of fullwave detectors 32, 34, 36, 38, 40, and 42, such that for a small differential input voltage, EQU V.sub.out .varies.(1+A+A.sup.2 +A.sup.3 +A.sup.4 +A.sup.5).vertline.V.sub.in+ -V.sub.in- .vertline.
As the differential input voltage increases, stage 30 will eventually reach its stage output limit L and its incremental gain will go to zero. For further increases in differential input voltage, EQU V.sub.out .varies.(1+A+A.sup.2 +A.sup.3 +A.sup.4).vertline.V.sub.in+ -V.sub.in- .vertline.+L.
It can be appreciated that as the differential input voltage continues to rise, stages 28, 26, 24, and 22 will reach their output limits in turn. V.sub.out thus approximates a logarithmic response because the amplifier "shuts down" amplifier stages at exponentially-spaced intervals as the differential voltage increases.
FIG. 2 shows two connected A/0 amplifier stages 24 and 26. Stage 24 uses matched transistors Q.sub.1 and Q.sub.2 and their loads R.sub.L in a well-known differential pair configuration. With a zero differential voltage input, the current provided by constant current source I.sub.A splits equally between transistors Q.sub.1 and Q.sub.2, and the differential output taken at loads R.sub.L is also zero. For small differential input voltages, the current split between transistors Q.sub.1 and Q.sub.2 becomes proportionally unbalanced, such that the differential output taken at loads R.sub.L represents an amplified version of the differential input. As the differential input increases, eventually all of the available bias current will be shunted through either Q.sub.1 or Q.sub.2, and the incremental gain for further increases will go asymptotically to zero. Logarithmic amplifier 20 of FIG. 1 can be implemented by connecting each of the stages of FIG. 1 as shown for stages 24 and 26 of FIG. 2.
In many applications, a logarithmic amplifier having a wide input frequency response of over 1 GHz is desirable. For a progressive-compression log amplifier, each stage capacitively loads its preceding stage (e.g., in FIG. 2, stage 26 loads stage 24), causing the amplifier gain to progressively roll-off at frequencies above some corner frequency. The corner frequency can be related to the time constant of the RC low-pass network formed by one stage's load resistances and the following stage's effective input capacitance. In practice, such loading effects can severely limit the frequency response of the amplifier, so that accurate operation at very high frequencies is precluded.
The corner frequency of a cascaded amplifier can be greatly extended by substituting the stage configuration of FIG. 3 for that of FIG. 2. The differential pair Q.sub.1, Q.sub.2 of FIG. 3 has outputs that are buffered by emitter followers Q.sub.3 and Q.sub.4. The emitter follower configuration reduces the effective output resistance driving the next stage's input capacitance, typically by an order of magnitude or more as compared to R.sub.L. This decrease can produce a substantial improvement in the corner frequency of a progressive-compression logarithmic amplifier.